Coded QAM system

ABSTRACT

A block of output symbols is generated, using quadrature amplitude modulation, from a block of input bits. The input bits are processed, using one or more redundant codes having a Hamming distance greater than one, to produce digital words which control the in-phase components and digital words which control the quadrature components of the output symbols. A group of bits generated by a single coding step supplies bits for both types of digital word, thereby enabling that coding step to process simultaneously a larger number of bits than would be the case if separate coding were used for producing the two types of word.

RELATED APPLICATIONS

This application is related to commonly assigned U.S. patent applicationSer. No. 08/122,525 filed Dec. 1, 1993 entitled FRAME SYNCHRONISATIONFOR QAM and naming John D. Brownlie and Richard G. Willians asinventors.

FIELD OF THE INVENTION

The present invention relates to phase amplitude modulationparticularly, though not exclusively, using block coding.

BACKGROUND OF THE INVENTION

In digital phase amplitude modulation, the modulated signal consists ofa sequence of symbols in each of which a carrier has a selected phaseand amplitude. Only certain phase/amplitude combinations are permitted;these combinations may be plotted on a diagram with in-phase andquadrature axes to form a pattern; the set of allowable points in thispattern is commonly referred to as a constellation. If for example, onehas a 16 point constellation, it is a simple matter to modulate thesignal with a 4-bit word to be transmitted by regarding each point asassociated with a respective one of the 16 possible combinations of fourbits.

It has been shown however that by using a larger constellation (e.g. 32points) and a suitable coding of the 4 bits, the resultant inherentredundancy in the modulated symbol sequence can be exploited by a softdecision decoder to improve the reliability of decoding in the presenceof noise to an extent which exceeds the degradation caused by the largernumbers of points and results in a net coding gain. Coding gain isdefined as the difference (in dB) between the signal-to-noise ratio thata coded scheme needs to operate at a particular error rate and thatneeded by the equivalent uncoded system.

One method of achieving coding gain is by the use of convolutionalcoding; here however we are concerned primarily with block coding,though the synchronization arrangements to be described are not limitedto such cases.

It is inherent in block coding that output symbols are generated on ablock by block basis. Thus if a 16-point constellation is to be used formodulation at a rate of 3 bits/symbol, then the coding process needs toproduce 4n bits (for selecting points in the constellation) for every 3ndata bits received (where n is the length of a block of symbols).

Consider now the concept of set partitioning: the signal constellationis progressively partitioned into subsets having increasing minimumEuclidean distance between the points of each subset; Δ₀ <Δ₁ <Δ₂ . . .as illustrated in FIG. 1 for 16 point quadrature amplitude modulation.The Euclidean distance is simply the linear distance on the phasediagram between adjacent points of a subset; thus, assuming the sixteenpoints are on a unit grid, ##EQU1##

This distance is significant in that it is a measure of the capabilityof a hard decision decoder to discriminate between points in the subsetin the presence of noise. By labelling each partition with a binarydigit as shown we form a partition tree. In FIG. 1 the label for eachpoint is constructed from the bits labelling the partitions needed toreach it; it is convenient to write the bit corresponding to the firstpartition level as the rightmost bit of the point label and so on. Wethen see that points whose labels first differ (when read from right toleft) in the ith position (where the rightmost bit is the firstposition) are a Euclidean distance of at least Δ_(i-1) apart.

The concept of set partitioning in this manner is discussed in G.Ungerboeck's paper "Channel coding with multilevel/phase signals", IEEETrans IT-28, pp 55-67, January 1982.

The other primary consideration in the coding process is the Hammingdistance of the code or codes employed. FIG. 2 illustrates the codingprocess, in the form of an array. Of a total of Σk_(i) input bits, k₁bits are coded by means of an (N, k₁, d₁) code to form a first row ofbits a₁₁ . . . a_(1N), k₂ bits are coded by means of an (N, k₂, d₂) codeto form the second row of bits a₂₁ . . . a_(2N), and so on. The arrayhas N columns, the bits of each column forming a point label L₁ . . .L_(N).

An (n, k, d) code is one in which k input bits are coded into n bits,with a minimum Hamming distance of d.

For the 16 point constellation of FIG. 1 one might choose codes as setout below, with a block size of 8 symbols.

    ______________________________________                                        i     code         Euclidean Distance                                                                          d.sub.i Δ.sup.2.sub.i-1.sup.2          ______________________________________                                        1     (8, 1, 8)    1             8                                            2     (8, 4, 4)    2             8                                            3     (8, 7, 2)    4             8                                            4     (8, 8, 1)    8             8                                            ______________________________________                                    

Total number of input bits=Σk_(i) =20.

The square Euclidean distance Δ² _(i-1) increases down the column, withthe Hamming distance d decreasing down the column. The minimum value ofthe product d_(i) Δ² _(i-1) is preferably large for good performance.Note that although the fourth row is actually uncoded--i.e. the 8 bitsare simply 8 of the input bits unaltered, it is convenient to view thisas an (n, n, 1) "code".

The codeword array concept is described in Imai & Hirakawa's paper "Anew multilevel coding method using error-correcting codes", IEEE TransIT-23, pp 371-377, May 1977, and in relation to Reed-Muller codes by E.Cusack, "Error control codes for QAM signalling", Elec. Letts., 20, pp62-63, Jan. 19th 1984.

It is worth noting at this point that the labelling of bits in FIG. 1 isentirely systematic. Although in most cases this is the most convenientway of proceeding, it is not essential in all cases. In particular, iftwo rows of the array are coded with codes having the same Hammingdistance (or are uncoded) then the lower of these two rows can beallowed a larger Euclidean distance without reducing the coding gain,and therefore the meaning of the two bits from these rows for any one ormore symbols can be transposed with no effect, for example, if thebottom two rows are uncoded, then the allocation of the correspondinglabel bits to the signal points of the constellation can be entirelyarbitrary (although this allocation may be subject to other constraints;e.g. for the purpose of achieving 90° phase jump immunity, as will bediscussed below). A departure from structured partitioning which resultsin a reduction of the minimum d_(i) Δ² _(i-1) product will produce adegradation of performance but may still provide a performance betterthan that of the uncoded case. Indeed, random labelling does notnecessarily preclude some coding gain, but for good results then, if wedefine the Euclidean significance of a label bit as being the smallestchange of Euclidean distance that changing that bit can produce, it ispreferable that the label bits do not all have the same Euclideansignificance. In the following description, the term "significance" isused to mean Euclidean significance as defined above, and labels arewritten with the significances of the bits increasing from right to left(analogously to the conventional representation of binary numbers). Thisconvention can give rise to ambiguity in that two bits of a given labelcan have the same significance, but no confusion arises since in thissituation it generally does not matter which bit is which.

A modification to this method has been proposed by RGC Williams and PGFarrell in "Combined Coding and Modulation with decreased decodingComplexity", IEEE ISIT '88, Kobe, Japan, June 1988. They regarded themodulated signal as being the sum of two amplitude modulated signals inphase-quadrature and coded separately in the two dimensions. Thus thetwo-dimensional constellation was regarded as two one-dimensionalconstellations transmitted in quadrature. It follows that the setpartitioning process discussed with reference to FIG. 1 is carried outin the two dimensions separately. This is shown in FIG. 2A for the xdimension. Note that the labels actually correspond to the x coordinateas measured from the leftmost point; if different senses are chosen forthe 0/1 division at any partition this simply results in one or morebits of the label being inverted relative to the coordinate bit.

Coding is illustrated in FIG. 3 for the general case. Here the as and bsare elements of codes as before. Now each dimension has its own codewordarray, producing labels L_(x1), . . . L_(xN) ; L_(y1) . . . L_(yN). Inprinciple different codes could be used in each dimension's array ifquadrant phase immunity is not required.

FIG. 4 shows a specific example of such a scheme assuming we wish tosend 3 bits/symbol over a 16-point QAM signal constellation, with ablock size of N=8. We require two bits per symbol in each dimension(=four bits/symbol); for a block we generate 4N=32 bits from m=24 inputbits (i.e. the rate of the code is 24/32=3/4). The 24 input bits aredivided into two groups of 12 (note that these schemes take nocognizance of the meaning of the input bits and it is immaterial whetherthe 24 bits are eight 3-bit words or three 8-bit words; thus thedivision into two groups is arbitrary). Of each group of 12 bits, fourare coded into the 8 bits of the first row of the relevant array usingthe (8, 4, 4) Reed-Muller code, and the remaining 8 pass unmodified intothe second row. Assuming the FIG. 2A partioning, each column forms the xor y coordinate of a symbol to be transmitted.

Again, the top row forms the least significant bit.

A 16-point constellation is shown in FIG. 5 with labels derived from theFIG. 2A partioning. The method employed for decoding this array involvesdecoding separately in the two dimensions. Imagine that a demodulatorhas received the eight points (relative to the lower left point of theconstellation) of a block and the x-coordinates of the received pointsare

    (1.02, 2.94, 0.23, 2.53, 3.23, 0.45, 2.03, 1.24)

The first step is to regenerate the first row of the coding matrix;these bits indicate whether the coordinate is odd or even; thus thereceived vector is converted into a vector with values between 0 and 1indicating the distance of the received x-coordinate from the nearesteven number, viz

    (0.98, 0.94, 0.23, 0.53, 1.0, 0.45, 0.03, 0.76)

Note that 3.23 is given the value 1.0 since the largest even coordinatein the constellation is 2.

Application of a soft-decision decoding algorithm gives informationdigits 1010, implying a transmitted top row codeword of 11001100. Thistype of soft-decision decoding is well known; however for a moredetailed description in relation to decoding in the separate dimensionssee R. G. C. Williams, "Low Complexity Block Coded Modulation", Ph.D.Thesis, Victoria University of Manchester, U.K., August 1988.

Knowing the least significant bit of each symbol (i.e. whether thesymbol is even (0) or odd (1)) an inspection of the received coordinatesshows that the transmitted vector is (1, 3, 0, 2, 3, 1, 2, 2) and theremaining eight information bits are (0, 1, 0, 1, 1, 0, 1, 1). Clearlyif more than two rows were involved, then the algorithm could be appliedprogressively; in a more sophisticated system the results of laterdecisions could be fed back to modify earlier decisions (again discussedby Williams).

Note that if the same codes are chosen for each dimension's array thenthere are fewer different decoders required for the decoding since eacharray has only half the number of rows of the equivalent 2 dimensionalarray. Another feature of this scheme is that the decoders work with1-dimensional distances and are therefore not as complex as the decodersused in the original scheme which worked with 2-dimensional distancesdue to the nature of the signal constellations.

SUMMARY OF THE INVENTION

According to one aspect of the present invention there is provided anapparatus for modulating digital signals onto a carrier, comprising:

means for receiving a block of bits to be transmitted;

coding and partition means for partitioning each block into groups ofbits, at least one group having been coded by a redundant code having aHamming distance greater than one, the partitioning and coding beingsuch that each group has the same number of bits;

means for assembling a plurality of digital words from the bits of thesaid groups;

means for quadrature amplitude modulation of a carrier to form aplurality of successive output symbols, the two quadrature components ofeach symbol being determined by a respective pair of the digital words;

characterized in that each word contains a bit from each group, wherebythe or a single redundant code produces bits which control bothquadrature components of each symbol.

Preferably in the coding and partitioning means at least one other groupis either uncoded or is coded using a code having a smaller Hammingdistance than the said one group, and the modulation means is soarranged that each bit supplied thereto as part of the pair of digitalwords which is derived from the said other group produces a minimumEuclidean distance which is greater than that produced by any bitderived from the said one group. In particular it is preferred that atleast one coded group is coded employing a code which has a Hammingdistance greater than that obtainable by dividing the group into twosubgroups and coding each subgroup independently into the same totalnumber of bits.

If desired, for improving resistance to 90° phase jumps, the apparatusmay include means to examine bits determining a predetermined symbol ofa block and those of a predetermined symbol of the preceding block todetermine the angular difference between the quadrants occupied by thosesymbols; means for rotating the phase of the transmitted symbols of theblock in question by the said angular difference, and means formodulating the carrier with information representing .the angulardifference.

In another aspect the invention provides a modulation apparatuscomprising quadrature amplitude modulation means operable in a firstmode to produce one of a plurality of discrete output symbols eachhaving a predetermined phase and amplitude and operable in a second modeto produce one of a second such plurality of discrete output symbolseach of which has at least one quadrature component with an amplitudegreater than that of the corresponding component of any of the firstplurality of symbols, means for supplying to the quadrature amplitudemodulation means digital words for selecting of output symbols, andblock timing means operable to produce a block synchronization signalduring a predetermined symbol period of a block of symbols, thequadrature amplitude modulation means being responsive to receipt of thesynchronization signal to operate in the said second mode for productionof a symbol during that period.

BRIEF DESCRIPTION OF THE DRAWINGS

Other preferred features of the invention are set out in the subclaims.

Some embodiments of the invention will now be described, by way ofexample, with reference to the accompanying drawings, in which:

FIG. 1 is a phase diagram showing a known way of partitioning a 16 pointQAM constellation;

FIG. 2 illustrates by means of an array one known method of blockcoding;

FIG. 2A is a diagram illustrating partitioning in one dimension;

FIG. 3 illustrates in similar fashion a second known method of blockcoding;

FIG. 4 is an array illustrating a specific example of the array of FIG.3;

FIG. 5 is a phase diagram showing the labelling of the points of a 16point QAM constellation as used in a first embodiment of the presentinvention;

FIG. 6 is an array illustrating the operation of the first embodiment ofthe invention;

FIG. 7 is the known array of FIG. 4, redrawn for comparison purposes;

FIG. 8 is an array illustrating a second embodiment of the invention;

FIG. 9 is an array illustrating a third embodiment of the presentinvention;

FIG. 10 is a block diagram of a coder operating in accordance with thearray of FIG. 9;

FIG. 11 is a block diagram of a corresponding decoder;

FIG. 12 is a block diagram of a modified form of coder and decoder;

FIG. 13 and 14 are phase diagrams showing enlarged constellationsemployed in a further modification of the invention;

FIG. 15 is a block diagram of part of the coder of FIG. 10, modified toprovided synchronization;

FIG. 16 is a block diagram of a modified form the of the decoder of FIG.11, with synchronization circuitry added; and

FIGS. 17 and 18 are block diagrams of, respectively a coder and decoderin accordance with a further embodiment of the invention.

DETAILED DESCRIPTION OF THE DRAWINGS

The proposed modulation scheme uses only one array of 1-dimensionalcomponents, the output information being shared between the two QAMsignal coordinates.

FIG. 6 shows an arrangement which is essentially FIG. 4 cut in half.Although the number of columns in the array is still 8, the block sizeis now 4 since two columns are required for the x and y coordinates ofone symbol. Thus the number of bits transmitted per symbol, and thecoding gain, are unchanged, but the block size is halved.

It is important to appreciate the fundamental difference between thisscheme and the earlier one-dimensional scheme, and that thisappreciation is not obscured by any particular way of drawing thediagrams used to represent the schemes. Referring to FIGS. 7 and 8, FIG.7 shows a scheme similar to that shown in FIG. 4, (with eight symbolsper block) but with a rate of 1/2, thus accommodating only 16 input bitsper block. FIG. 8 shows a conjectural scheme as envisaged by the presentinvention, also with a block size of 8.

Again we have to generate a total of 32 bits (16 in each row). If weconjecture that, of 16 input bits, we code 2 bits into the first rowwith a (16, 2, 8) code and fourteen in the second row using a (16, 14,2) code then we have achieved no advantage. However, a (16, 5, 8) codeand a (16, 15, 2) code both exist (Reed-Muller codes) and if (as shownin FIG. 8) we employ these then although the block size and coding gainare unchanged, the scheme has an enhanced transmission capacity of 20rather than 16 bits.

It may be noted that this example has the same performance as theconventional 20-bit scheme discussed in the introduction; however it hasthe advantage of reduced complexity of coding.

It is a known property of redundant codes that the maximum Hammingdistance d obtainable, for a code of a given rate, increases with thelength of the code. The invention thus exploits this fact by, for atleast one array row, coding the bits controlling the x and y coordinatesof the constellation symbols together using a single code.

The advantage of this is that one or more of the following (for a givensignal constellation) can be enhanced compared with using entirelyseparate coding of the two dimensions

(a) the block size

(b) the coding rate (i.e. no. of bits/symbol)

(c) the coding gain.

Improvement (a) is exemplified by the comparison between FIGS. 4 and 6,whilst that of (b) can be seen from FIGS. 7 and 8.

To illustrate meaningfully an improvement in coding gain by such adirect comparison is more difficult since for a given coding scheme inaccordance with the invention this involves visualising an equivalentdecoupled-coding scheme having the same rate and block size. Animprovement in coding gain necessarily involves an improvement in theHamming distance d_(i) for all rows having a minimum d_(i) Δ_(i) ² ₋₁product, so that for any scheme having such a row with d_(i) =1 adirectly equivalent decoupled scheme does not exist since this wouldneed a Hamming distance of 1/2.

A more practical scheme, using a larger block size, will now bedescribed, together with particulars of its implementation. The schemeis set out in FIG. 9, in the same manner as before.

This codes 4 bits/symbol onto a 64 point constellation, using a blocksize of 16; the coding rate is 2/3. The first array row uses the (32, 6,16) Reed-Muller code, the (32, 26, 4) extended Hamming code and anuncoded (32, 32, 1) row.

A suitable constellation is shown as the centre portion of FIG. 13,where point labels (which are the same as the x, y coordinates) areindicated in octal notation. The outer (underlined) 64 points will bediscussed later. A block diagram of a coder for implementing this schemeis shown in FIG. 10. An input 1 is assumed to receive serial data at 9.6k bit/s which is clocked into a 64-bit serial in parallel-out shiftregister 2 under control of a 9.6 kHz clock signal .φ₁ from a masterclock generator 3 synchronized (by means not shown) to the input bitstream. Every 64 bits, the parallel output is loaded by means of asecond clock signal (at 9600/64=150 Hz) into a register 4. Of the 64bits in this register, 6 bits are fed to a coder 5 which implements the(32, 6, 16) Reed-Muller code and produces 32 bits a₁,j whilst 26 bitsare supplied to a coder 6 which implements the (32, 26, 4) extendedHamming code and produces 32 bits a₂,j. The remaining 32 bits areuncoded and form the 32 bits a₃,j shown in FIG. 9. As mentionedpreviously the allocation of which bits go to which coder is arbitrary.

The 96 bits a_(1j), a_(2j), a_(3j) are now supplied to six 16-stageshift registers 7-12. The registers 7, 8 and 9 are to contain the xcoordinates of the output symbols and the registers 11, 12 and 13 the ycoordinates. Sixteen of the heavily coded bits a_(1j) from the coder 5are loaded in parallel into the shift register 7 and the other 16 intothe register 10. Similarly the less heavily coded bits a_(2j) from thecoder 6 are loaded into the registers 8 and 11, sixteen into each, andthe uncoded bits a_(3j) are equally divided between the registers 9 and12. The loading occurs under control of a 150 Hz clock signal φ₂ 'delayed with respect to the signal φ₂ to allow for delays in the coders5, 6.

The six registers 7-12 now contain the x and y coordinates of sixteensymbols to be transmitted; once loaded their contents are clocked outunder control of a 2.4 kHz clock φ₃ (i.e. at a baud rate of 2400). Thus,every symbol period, a three-bit word representing the x coordinate ofthe symbol to be transmitted is available at the output of the registers7, 8, 9 where register 9 supplies the most significant bit and register7 the least. Similarly the y coordinate is available at the output ofthe registers 10, 11 and 12.

These outputs are used to control modulation of a carrier; this processis illustrated in the diagram by a pair of amplitude modulators 13, 14supplied respectively with carrier C_(l) and carrier C_(Q) in phasequadrature to it, whose outputs are added in an adder 15 to provide amodulated output at an output 16. Although not shown, any of the usualtechniques conventionally employed for avoiding phase or slopediscontinuities in the modulated signal may be employed. Note thatalthough coordinates here are expressed relative to the bottom leftpoint of the constellation, a symmetrical representation is more usual.This simply represents a translation of (-3.5, -3.5) which is assumed tooccur in the modulators 13, 14.

Another scheme similar to that shown in FIG. 9 uses the following codes.

    (32, 16, 8) Reed-Muller for a.sub.1j

    (32, 31, 2) Parity Check for a.sub.2j

    (32, 32, 1) Uncoded for a.sub.3j

This has an inferior noise immunity to that of FIG. 8 but has a highercoding rate of 79/96, i.e. it carries an extra 15/16 bit/symbol. If afourth, uncoded, row is added and a 256 point signal constellation (e.g.as shown in the inner portion of FIG. 14) is used, then it can carry 111bits/block, i.e. 615/16 bits/symbol. If provision is made (as describedbelow) for carrying one extra bit per block, a bit rate of 19.2 kbit/sat 2743 baud can be achieved.

Note that the scheme described apparently requires an even length forthe codeword array, so that the columns of the matrix can be dividedequally between the two coordinate axes. However, if an odd length q isdesired this can be accommodated. One method of coping with this wouldbe to carry over one coordinate of alternate blocks to the next block,so that alternate transmitted blocks contain (q-1)/2 and (q+1)/2 symbolsrespectively.

Decoding of these signals is carried out in a manner analogous to thatdescribed in the introduction for entirely separate decoding on the twodimensions, the essential difference being of course that the x and ycoordinates obtained from the demodulator are assembled into a singlevector (in the same sequence, naturally as at the transmitter) andprocessed together.

A block diagram of a decoder for the code of FIG. 9 is shown in FIG. 11.A demodulator 20 receives the incoming signal and includes carriersynchronization recovery and symbol synchronization; it demodulates thesignal to obtain x and y coordinates in digital form. Assuming, as isconventional, that these coordinates are relative to the point ofsymmetry of the constellation, adders 21, 22 add 3.5 to each coordinateto produce the x, y coordinates relative to the lower left hand cornerof the constellation. As shown, the outputs of the adders are to 8-bitaccuracy (3 bits before the binary point, since the maximum coordinateis 7). The demodulator also produces symbol clock signals φ_(s).

The output coordinates are clocked into 16 state (16 being the blocksize) shift registers 24, 25 under control of the symbol clock φ_(s)and, each block period, loaded in parallel under control of a blocksynchronization signal φ_(B) into a 32×8 bit buffer 26. The leastsignificant seven bits of each word pass via a unit 27 which derives thedistance of each coordinate from the nearest even number in the range 0to 6 and supplies these to a soft decision decoder 28 for the (32, 6,16) Reed-Muller Code. The output of this decoder is 6 data bits and thevalid 32-bit word which the decoder has judged the transmitter to haveused in the first row of the array.

The former are supplied to an output register 30, the latter to a unit31 which adjusts the values of (the least significant seven bits of) thenext 32 coordinates from the register 26 (i.e. constrains them to be thenearest odd or even number according to the output of the decoder 28),prior to passage to a soft decision decoder 32 for the (32, 26, 4)extended Hamming code. This decoder supplies a further 26 data bits tothe output register 30. The decoder 32 also has an output for the 32bits which it has judged the transmitter to have sent; these aresupplied, along with the corresponding bits from the decoder 28, to aunit 33 which makes any necessary adjustment to the remaining 32 (mostsignificant) bits from the register 26. As these bits are uncoded theythen pass directly to the output register 30. The total of 64 bits fromthe register 30 are forwarded to the receiver's output 34. The 32-bitoutputs from the decoders 28, 32 are also conducted to an auxiliaryoutput 35 along with the adjusted uncoded bits from the unit 33.

When using signal constellations that contain rotational symmetriesthere is a danger that they may suffer an undetected phase shift. If,during transmission, there is something on the channel that rotates theconstellation points through one of its angles of symmetry then thereceiver's carrier tracking circuits will be fooled. The receiver willthink that it is receiving perfectly good points and will produce databut this data will be based on the labels of the wrong points. Forexample, if a QAM signal constellation is rotated through 90° duringtransmission then the receiver will produce data based on the labels ofpoints in the quadrant adjacent to those that the transmitted data hadselected. If we are not careful the data that we output will be wrong.It is clearly necessary to take action to prevent catastrophic errorpropagation. The problem has traditionally been overcome in theconvolutionally encoded case by using the process of differentiallyencoding the data first.

In the case of block codes, it has been proposed by Brownlie andWilliams to apply a differential coding between blocks. A quadrantrotation is determined by comparing the quadrant bits (i.e. the mostsignificant x bit and the most significant y bit) of the first symbol ofthe block and the quadrant bits of the first symbol of the previousblock. The first symbol is chosen for convenience but any otherconsistent choice would be satisfactory. This quadrant rotation is thenapplied to all symbols of the block being transmitted.

This means that the quadrant bits of the first symbol becomes zero;these are not transmitted: instead we substitute the difference.

After the decoder at the receiver the difference bits in the firstsymbol are differentially decoded. The difference bits are also used toapply the reverse rotation to all the symbols of the block and thedifferential decoder's output replaces the block's quadrant bits. Asystematic quadrant phase error in the transmission path is thuscancelled since this affects equally both the phase of the receiveddifference and the phase of the received symbols.

Note that this procedure requires that the most significant bits of thefirst symbol also indicate the quadrant: this is true for the partioningof FIG. 1, but care needs to be taken if less systematic bitallocations--or constellations other than those having 2^(n) points in asquare array--are used.

A coder and decoder implementing this procedure for the code of FIG. 9are shown in FIG. 12. Items 2 to 6 of FIG. 10 are shown as an encoder50. The most significant bits a₃, 1 and a₃, 17 of the first encodedsymbol of the block are separated and supplied to a differential phaseunit which takes the difference between its output one block previously(via a delay 52) and its input. Note that this unit does not take thedifferences between the bits, but provides an output indicating thephase difference (for example by means of a look-up table). All the bitsare supplied to a rotator 53 which applies a phase shift of 0°, 90°,180° or 270° as indicated by the output of the differential unit 51.This involves complementing the bits and/or transposing x and y values,thus:

    ______________________________________                                        Phase (clockwise)                                                             ______________________________________                                         0° x out = x in   y out = y in                                         90°                                                                              x out = y in   y out = .sup.----x in                               180°                                                                              x out = .sup.----x in                                                                        y out = .sup.----y in                               270°                                                                              x out = .sup.----y in                                                                        y out = x in                                        ______________________________________                                    

The differentially encoded quadrant bits of the first symbol aresubstituted for the quadrant bits of the output from the rotator. Theseare then fed to a modulator 54 which contains items 7 to 16 of FIG. 10.

After transmission over a link 55, the inputs are demodulated in ademodulator 56 containing units 20 to 26 of FIG. 11, and then pass to adecoder 57. This contains units 27 to 32 of FIG. 11; however the outputthat is required from the decoders 30, 32 is not the data bits but thebits deemed by the decoder to have been received by thetransmitter--i.e. the auxiliary output 35 of FIG. 11.

The differentially encoded quadrant bits from the first symbols aresupplied to a differential decoder comprising a one-block delay 58 andphase difference unit 59 (e.g. a look-up table similar to that used forthe unit 51) to produce received bits (a'₃, 1, a'₃, 17); it alsocontrols a rotator 60 which receives the remaining bits from the decoder57 and applies (assuming no phase shift on the link 55) the oppositephase rotation to that applied in the transmitter rotator 53. In theevent of a clockwise phase shift of n×90° on the link, the amount ofrotation (anti clockwise) in the rotator 60 is, increased by n, therebycompensating for the n×90° clockwise rotation of the received symbols(other than the quadrant bits of the first symbol which are compensatedby the differential coding).

The bits output from the units 59 and rotator 60 are now correct, and arelatively simple data extractor unit 61 derives the data bits from theReed-Muller and Extended Hamming--coded bits and passes these, alongwith the uncoded bits, to an output 62.

This method of achieving 90° phase jump immunity has a number ofimplications for the codes used. Since the phase rotations introduced atthe transmitter cannot be removed until after the soft-decision decoder57, it is essential that the changes which these rotations make to thebits of the transmitted array are such that each coded row of the arrayremains a valid codeword--for example the changes made to the bits a₁, jmust not generate a codeword which the Reed-Muller code cannot produce.

The same phase rotation is applied to all bits except for the quadrantbits of the first symbol. Therefore it is necessary that (as here) thesebits are derived from an uncoded row.

In the coded rows, in the case of the codes described in the Williamsthesis referred to, the transposition of x and y places no constraint onthe codes since the two coordinates are coded separately, whilst thefact that x or y may be complemented means that the code used must besuch that if it contains a codeword A it also must contain itscomplement A.

In the case of the present embodiment, two things may occur, viz,complementing x and y; or transposition of x and y and the complementingof one of them. The first situation is met by the constraint justmentioned. The second means that (given, as shown in FIG. 9 that the xcoordinates are taken from the first half of the codeword and the y fromthe second), if BC is a valid codeword, where B and C are its twohalves, then CB and CB are also valid codewords. Both the Reed-Mullerand extended Hamming codes possess this property.

The foregoing description of the coder and decoder has assumed that acoordinate (relative to the lower left point) and a point label aresynonymous, though--as has already been pointed out in the discussion ofFIG. 2A--this is not essential; but the only change that can occur tothe coded bits is that one or more label bits are complemented relativeto the coordinate bits. In the coder of FIG. 10, this simply requiresthat conversion of labels to coordinates needs to occur in themodulators 13, 14. In the decoder, the situation is slightly morecomplex. If the same partitioning is used in the x and y directions, sothat relative complementing will occur on all bits of a given row of thecodeword array, then the aforementioned constraint on the codes that Aand A are both valid codewords will ensure that operation of theReed-Muller and Extended Hamming Decoders will be unaffected. Ifdifferent partitioning is used this will impose other constraint (e.g.that BC and BC are both valid codewords).

Assuming these constraints are met, then it is a simple matter to invertdecoded bits output from FIG. 11.

It will be apparent that it is crucial to all methods of block codingthat block synchronization be maintained. Initial synchronization canreadily be achieved by conventional start-up-procedures, but provisionneeds to be made to recognize and rectify loss of synchronization. Anyof the conventional block synchronization methods may be employed by theapparatus just described.

The method now to be described (which may also be used in other systemsrequiring block synchronization) involves the use, once per block, of anexpanded signal constellation, having twice as many points (theadditional points surrounding the `normal` constellation). The bitassignments of the expanded constellation remain the same as for thenormal constellation for those points which are common to both, whilstthe added points in the larger constellation will have a `1` appended totheir bit assignments. FIG. 13 shows, as well as a basic 64 pointconstellation such as might be used for the scheme of FIG. 9, 64additional points. Point labels--shown as (x, y) coordinates in octalnotation--referred to the corner of the basic constellation--areindicated; for the inner points these follow the same convention as inFIG. 1. FIG. 14 shows a similar 256+256 constellation (labelled usinghexadecimal notation) for use with the 256--point modified FIG. 9 schemereferred to above.

The expanded constellation could in principle be used more than once perblock but its use needs to be limited to a minority of the transmittedsymbols if the mean power of the signal is not to be increasedexcessively.

The proposed method of block synchronization involves the use of theenlarged constellation for transmission of the one specified (e.g. thelast) symbol of each block.

In the receiver, this fact is detected; if the receiver counts thenumber of symbols between `last symbol` detections it can verify correctblock synchronization by checking that this count is an integralmultiple of the block length. If block synchronization is lost thereceiver can wait until the next detection of two last symbol detectionsan integral multiple of block length apart and realign its blocksynchronization to these received symbols.

The expanded constellation can also serve to permit transmission of anextra bit per block--either for the provision of a secondary channel orto increase the main channel capacity (e.g. to increase the capacity ofthe 256 point modified FIG. 9 scheme from 111 to 112 bits per block).One symbol per block can be used in this way for both extra capacity andblock synchronization, but a penalty is felt in block synchronizationrecovery time since, effectively, not all blocks will then carry a blocksynchronization marker.

The constraints on labelling of the additional points need to bementioned.

(1) The constraints on the Euclidean significance need to be maintained.If--as suggested earlier--a constellation is used with two coded rowsand two uncoded rows then the two least significant bits of the labelsof the additional points need to follow the same pattern as the originalpoints; thus in FIGS. 13 and 14 the least significant bit of eachcoordinate follows the pattern 0, 1, 0, 1, 0, 1, 0 etc across the wholediagram and the least significant but one has a pattern 0, 0, 1, 1, 0,0, 1, 1 etc. It has already been mentioned that the two bits derivedfrom uncoded groups can (as far as Euclidean distance considerations areconcerned) be assigned arbitrarily to the two most significant bitpositions of the label.

(2) The method described for achieving 90° phase-jump immunity assumesthat the most significant bit of each coordinate indicates the quadrantoccupied by the relevant point. If this is also true of the labelling ofthe outer points, then no difficulty arises; if--as in FIGS. 13 and14--this is not the case then two consequences ensue; firstly, theexpanded symbol must not be used in the first (or other) positioncarrying the rotation information, and secondly the rotators 53 and 60would require a look-up table to effect the required rotation.

The proposed block synchronization method may be implemented for a basic64-point constellation with 64 additional points using the circuit ofFIG. 15 which replaces items 13 to 16 of FIG. 10. The x and y labelsfrom the registers 7, 8, 9 and 10, 11, 12 are routed to the addressinputs of a read-only memory 17 containing a look-up table: the dataoutput of this feeds the inputs to the modulators 13', 14', which ofcourse now each have four input bits. A seventh address line is suppliedwith a 150 Hz block synchronization signal φ₂ " from the clock 3. Thisoccurs (i.e. goes to "1") one symbol period earlier than the signal φ₂ 'and thus occurs during the last symbol of a block--as envisaged in theabove discussion (though obviously it can be timed to occur at anydesired block position).

The contents of the memory 17 are such that, when the synchronizationsignal φ₂ " is inactive (="0") the data output is identical to the lowersix address inputs, but when the signal φ₂ " is high then the output isthe label of that one of the 64 additional points of the constellationwhich has the same label as the inner point having the coordinatesapplied to the address input.

The decoder of FIG. 11 is redrawn in modified form in FIG. 16. In thisversion the (conventional) x and y coordinates output from thedemodulator 20 are monitored by comparators 100, 101 whose outputs arecombined in an or- gate 102, such that the latter produces an outputwhenever the modulus of either coordinate exceeds 4, indicating thepresence of a synchronizing symbol. A counter 103 driven by the symbolclock φ_(S) counts the number of symbol periods between consecutivesynchronizing symbols and a comparator 104 checks that this count is aninteger multiple of the block length (16 in this example). If not, itproduces an output to re-synchronize (if necessary) a block clockgenerator 105 which produces block synchronization pulses φ_(B).

Since, when the outer 64 points of the constellation are in use, the(shifted) coordinates output from the address 21 to 22 have a range from-2 to +9 and hence two additional lines are required--a sign bit and anextra (most significant) bit. In this embodiment two's complementrepresentation is used, so that the least significant two bits of thecoordinates correspond to the labels and no modification is needed tothe decoder 28, 30. The two extra bits pass, like the original mostsignificant bit, directly from the register 26 to the adjuster 33 andthe 32-bit outputs from the decoders 28, 32 and the 96 bits from theadjuster 33, are converted into serial form by parallel-in/serial-outshift registers 106-115. Each pair of co-ordinates is then used as anaddress to access a read-only memory 116 which serves to convert theouter point coordinates into the corresponding labels which are thenconverted by an extractor 61' analogous to the extractor 101 of FIG. 12into data to be output on an output 34.

In the event that the synchronizing symbol is to serve also forsecondary channel data this is achieved in the coder by gating the blocksynchronizing pulses φ₂ " in an and--gate 200 (shown dotted in FIG. 15).At the decoder the data are extracted by picking up the sign bit and(new) MSB for both coordinates of the last bit of the block from theoutput of the adjuster 33 and combining these in an or gate 201 (showndotted in FIG. 16). The synchronization arrangements are unchanged sincethe counter 103 and comparator 104 are already arranged to cope with theabsence of expected synchronizing symbols.

As mentioned above, this technique for synchronization is not limited toblock coding but may also be used in other situations where blocksynchronization is required. For example in convolutional coding wherethe coding process does not have a block structure but blocksynchronization may be required for other reasons--e.g. dataframing--modulation may be switched to use the outer points of anenlarged constellation at regular intervals corresponding to a desiredblock length.

FIG. 17 shows an embodiment employing convolutional coding. The codingused is a modification of the CCITT V. 32 standard. Data to betransmitted are received in groups of four bits Q1 . . . Q4, of whichtwo bits Q1, Q2 are subject to modulo-4 differential coding in adifferential coding unit 300, to produce difference bits Y1, Y2; theseare processed by a convolutional coder 301 to produce an additional bitY0. Bits Y0, Y1, Y2, Q3 and Q4 are supplied to a modulator 302. Themodulator contains a look-up table or map relating bit combinations(labels) to phase/amplitude combinations and generates a QAM outputsymbol. In a first mode, these five bits are used to select a symbolfrom a 2⁵ =32-point constellation; the bits Y0, Y1, Y2 serve to selectbetween eight possible subsets and the bits Q3, Q4 serve to identify onpoint of the chosen subset. The description thus far is conventional.However the modulator 302 has a sixth input S5 supplied with a pulsefrom a block synchronizing generator 303, every p blocks, where p issome desired block length. The presence of a pulse at this input servesto switch the modulator into a second mode in which the output symbol isinstead selected from a further 32 additional outer constellationpoints. The labelling is such that the subset selected by Y0, Y1, Y2extends into this outer region in accordance with the partitioningapproach discussed earlier. The pulses S5 can be gated (by an and gate304) with an additional data input Q5 so that secondary channel data canbe carried by the synchronizing symbol.

A decoder is shown in FIG. 18. Those parts whose function issubstantially the same as for decoding of a signal from a conventionalV. 32 modulator will first be described. A demodulator 310 produces, foreach received symbol, x and y coordinates; it also generates a symbolclock φ_(S). A unit 311 receives each pair of coordinates and quantizesthese to the eight possible subsets that can be chosen by thecoder--i.e. it produces on an output 312 the coordinates of the eightpoints of the constellation (one in each subset) which are the closestto the coordinates of the received symbol. It also produces on an output313 eight distance metrics, being the Euclidean distance of the receivedsymbol from those eight points. These metrics are processed by a Viterbidecoder 314 to determine which subset is deemed to have been received,and outputs decoded bits Y0', Y1', Y2'. Bits Y1', Y2' are fed to adifferential decoder 315 which reverses the differential coding of unit300 and produces output bits Q1', Q2'. The three bits Y0', Y1', Y2'identify the subset in which the received symbol is deemed to lie andcontrol a selector 316 to select the corresponding one of the eightpairs of coordinates from the line 312 (delayed in a unit 317 to allowfor the Viterbi decoder delays); the selected coordinates are thenapplied to a look-up table 318 which derives decoded bits Q3', Q4' inaccordance with the mapping of the latter performed by the modulator301. The operation of the units 314, 315 is identical to that of astandard V. 32 decoder, whilst that of units 310, 311, 317, 316, 318 issimilar except that they must accommodate the larger constellation; inparticular the table 318 has an additional output for the synchronizingbit (S5'). Synchronizing of a block clock generator 105 is achieved bycomparators 100, 101, OR gate 102, a counter 103 and a comparator 104whose function is identical to that of the same components in FIG. 16.As the synchronizing bit S5' also carries secondary data this is routedto a data output 319 via an AND gate 320 fed from the clock 105; thusthe block clock serves to prevent output of erroneous data on symbolsother than the synchronizing symbol.

The clock output is also supplied to the unit 311 to limit thequantization to points of the inner constellation except on thesynchronizing symbol.

Another situation in which these synchronizing provisions are of valueis for changing data rate during transmission. Conventionally, if afirst modem is transmitting to a second modem and it is proposed (eitheras a result of manual intervention or an automated function) that thedata rate should be changed, then an escape code is transmitted and thusfrees the channel to permit transmission of rate instructions.

In the present proposal synchronizing is provided in the mannerdescribed above, and a secondary channel is provided--either using thesynchronizing symbol as suggested earlier, or by multiplexing thesecondary channel with the data to be transmitted. Whether block orconvolutional coding is used the synchronization signals serve to permitseparation of the secondary channel bits at the receiving end.

This secondary channel is employed for the transmission of rateinformation. For example, suppose a first and a second modem are induplex communication and a decision is made at the second modem that(for example due to changing reception conditions) that the first modemshould increase its transmitting data rate, the second modem transmitsto the first, via the secondary channel, a signal indicating this fact.

In the event that the first modem is to change its transmitting datarate--in response to such a request, or upon manual intervention, or forsome other reason--it transmits, on the secondary channel, a signalindicating the rate to which it will change and a signal indicating thetime at which it will do so. The second modem, having decoded thisinformation, is then able to switch its receiving circuits at theappropriate instant so that continuous reception occurs.

All the codes referred to in this description are well known; forfurther particulars, reference may be made to "The Theory of ErrorCorrecting Codes", F. J. McWilliams & N. J. A. Sloane, North HollandPublishing Co. 1978.

We claim:
 1. An apparatus for modulating digital signals onto a carrier,comprising:means for receiving a block of bits to be transmitted; codingand partition means responsive to the means for receiving forpartitioning each block into groups of bits, at least one group havingbeen coded by a single redundant code having a Hamming distance greaterthan one, the partitioning and coding being such that each group has thesame number of bits; means for assembling a plurality of digital wordsfrom the bits output by said coding and partition means; meansresponsive to the means for assembling for quadrature amplitudemodulation of said carrier to form a plurality of successive outputsymbols each having two quadrature components, the two quadraturecomponents of each symbol being determined by a respective pair of thedigital words; wherein in said means for assembling each of said digitalwords contains one bit from each of said groups, so that at least onesaid group coded by said single redundant code produces bits which areapplied by said quadrature amplitude modulation means to determine afirst quadrature component of each symbol and produces bits which areapplied by said quadrature amplitude modulation means to determine asecond quadrature component of each symbol.
 2. An apparatus according toclaim 1, wherein, in the coding and partitioning means, at least onegroup either is uncoded or is coded using a code having a smallerHamming distance than the redundant code, and the modulation means is soarranged that each bit supplied thereto as part of a pair of digitalwords which bit is derived from the redundant code produces a minimumEuclidean distance which is greater than that produced by any bitderived from the one group.
 3. An apparatus according to claim 1 whereinat least one coded group is coded employing a code which has a Hammingdistance greater than that obtainable by dividing the group into twosubgroups and coding each subgroup independently into the same totalnumber of bits.
 4. An apparatus according to claim 3 including means toexamine bits determining a predetermined symbol of a block and those ofa predetermined symbol of a preceding block to determine an angulardifference between quadrants occupied by those symbols; and meansresponsive to said angular difference for rotating the phase of thetransmitted symbols of the block in question by the angular difference,said quadrature amplitude modulation means being responsive to saidangular difference for modulating the carrier with informationrepresenting the angular difference.
 5. An apparatus according to claim1 including means to examine bits determining a predetermined symbol ofa block and those of a predetermined symbol of a preceding block todetermine an angular difference between quadrants occupied by thosesymbols; and means responsive to said angular difference for rotatingthe phase of the transmitted symbols of the block in question by thesaid angular difference, said quadrature amplitude modulation meansbeing responsive to said angular difference for modulating the carrierwith information representing the angular difference.
 6. An apparatusaccording to claim 5 in which that one of the pairs of digital wordswhich determines the predetermined symbol contains two bits which arederived from a group which is not coded and which alone define the phasequadrant in which the symbol lies, and the means for modulating thecarrier with information representing the angular difference is operableto transmit two bits representing the angular difference in lieu of thetwo quadrant-defining bits of the predetermined symbol.
 7. An apparatusaccording to claims 2, 3, 5, 6 or 4 including block timing meansoperable to produce a block synchronization signal during apredetermined symbol period of the block, the quadrature amplitudemodulation means being responsive to receipt of the synchronizationsignal to produce a modulated carrier of greater amplitude than it canproduce in the absence of such receipt.
 8. An apparatus according toclaims 1, 2, 3, 5 or 6, in which the number of bits in each group isodd, and including means for storing, upon processing a first block of apair of blocks, one of the digital words, and for supplying, duringprocessing of the second block of a pair, the stored word to thequadrature amplitude modulation means, such second blocks containing anumber of symbols one greater than such first blocks.
 9. An apparatusaccording to claim 8 including block timing means operable to produce ablock synchronization signal during a predetermined symbol period of theblock, the quadrature amplitude modulation means being responsive toreceipt of the synchronization signal to produce a modulated carrier ofgreater amplitude than it can produce in the absence of such receipt.10. An apparatus according to claim 1 including block timing meansoperable to produce a block synchronization signal during apredetermined symbol period of the block, the quadrature amplitudemodulation means being responsive to receipt of the synchronizationsignal to produce a modulated carrier of greater amplitude than it canproduce in the absence of such receipt.
 11. An apparatus according toclaim 10 including gating means responsive to the means for producingthe block synchronization signal for controlling receipt or non-receiptof the block synchronization signal by the quadrature amplitudemodulator means, so that additional information may be transmitted foreach of said blocks.
 12. An apparatus according to claim 11, operable attwo or more different data rates, comprising control means operable inresponse to a signal representing a request for a change of rate:(a)firstly, for generating during transmission of said additionalinformation, signals identifying a data rate to which it is about tochange and the time at which it is to occur; and (b) at the identifiedtime, changing to transmission at the identified rate.
 13. An apparatusaccording to claim 10 including time division multiplex means,synchronized to the block timing means, for combining data input to theapparatus and additional information to produce the block of bits to betransmitted.
 14. An apparatus according to claim 13, operable at two ormore different data rates, comprising control means operable in responseto a signal representing a request for a change of rate:(a) firstly, forgenerating during transmission of said additional information, signalsidentifying a data rate to which it is about to change and the time atwhich it is to occur; and (b) at the identified time, changing totransmission at the identified rate.
 15. An apparatus for demodulatingdigital signals modulated on a carrier using the apparatus of claim 1,comprising:a demodulator for receiving a block of symbols and producingcoordinate values representing the two quadrature components thereof,means for assembling, for each block, groups of bits, each groupcontaining one bit from each said coordinate value; and decoding meansarranged to decode the groups, said decoding means including at leastone decoder for decoding a group in accordance with said singleredundant code having a Hamming distance greater than one.